The invention concerns decoding of an encoded video signal and particularly relates to the adjustment of a decoding clock to accommodate mismatches between its frequency and the frequency of an encoding clock in response to video synchronization signals in composite video obtained from decoded video data.
Efficient distribution of video data programming to multiple users is greatly assisted by compression techniques that maximize the amount of video data that can be packed into transmission channels. Two well-known techniques for video data compression are the MPEG 1 & 2 standards promulgated by the ISO (International Organization for Standardization). Both standards contemplate the compressive encoding of video data from a plurality of program data sources in response to a system clock. An MPEG encoder operates in response to the system clock, embodied as an encoding clock, producing an MPEG transport packet stream that includes encoded video data and, periodically, a data structure called a "program clock reference" from which the encoding clock frequency can be derived.
The MPEG transport packet stream is sent, using conventional means, through transmission channels in various media, including the atmosphere, space, and cable. Transmitted MPEG transport packet streams are received by a receiver/decoder that decodes video program data, providing composite video and accompanying audio data on a per-channel basis for user consumption. The operations of the receiver/decoder are synchronized by the system clock in the form of a decoding clock that is local to the receiver/decoder. The decoding clock is substantially identical to the encoding clock; however, it can vary in frequency and phase, with concomitant deterioration of decoded video programming.
High-quality receiver/decoder design should provide reliable video timing at the receiver/decoder by adjustment of the decoding clock rate to accommodate deviations of the encoding clock rate from a standard-specified system clock rate. Good design assumes that the encoding clock rate is "correct" and locks the frequency of the decoding clock to that of the encoding clock. This ensures system clock accuracy and reduces undesirable artifacts in composite video obtained by decoding the transmitted video data stream.
Decoding clock design must ensure accuracy of the decoding clock frequency with respect to the encoding clock frequency and must limit the rate at which the decoding clock is slewed.
In this regard, the decoding clock frequency must match the encoding clock frequency in order to prevent overflow and underflow of decoder buffers that may occur if the frequencies are not equal. Both overflow and underflow are prevented by locking the decoding clock frequency to the frequency of the encoding clock. Clock locking design must account for the allowance in the MPEG standards for encoding clock deviation from the system clock frequency. The standards provide for slewing the encoding clock within limits in order to maintain equivalency with the prescribed system clock frequency. The deviation and slew rate standards are applied to the encoding clock, with the assumption that the decoder will attempt to accurately reproduce the encoding clock. The drift or slew rate at the decoder is not required to adhere to the rate prescribed by the standard. Home video displays, which have tolerant synchronization circuits, can accommodate a significant degree of adjustment flexibility in decoding clock operation; VCRs, however, are far less tolerant. In either case, the frequency deviation and slew rate flexibility in the decoder is reflected in a substantial increase in size of decoder buffers in order to accommodate the decoder's lag in frequency acquisition.
Another problem encountered by allowing too much flexibility in decoding clock adjustment will arise when the decoder derives from the decoding clock a sub-carrier clock that is used to process sub-carrier burst frequencies. In this case, a slew rate limit is necessary to ensure that the sub-carrier clock will accurately track the sub-carrier burst frequency without causing noticeable color shifts. For example, the usual slew rates observed for chroma clock adjustment according to typical color specifications such as PAL would be violated by a decoding clock designed to the slew rate prescribed by the MPEG standards.
Thus, there is a significant tension between two design considerations in the decoding clock circuit. First, the best strategy to reduce decoder buffer size in order to accommodate video data stream overflow or underflow is to increase the slew rate of the decoding clock at the decoder. However, if the slew rate is too high for the derived chroma sub-carrier, then noticeable color shifts will occur, which are unacceptable.